3D Packaging & Wafer-Level Packaging
Dispensing applications for stacked dies with through silicon vias (TSV) and face-to-face stacked dies
3D packages are emerging in the semiconductor packaging industry to address the serious technical challenges such as miniaturization, faster interconnections, power saving, and limitation to node transition in the front-end process. Typical 3D-package structures are stacked dies with through silicon via (TSV) and micro-bump interconnections, and face-to-face interconnections with micro-bumps for two dies. These are silicon "die" base structure.
Wafer-level packages (WLP) are the molded die components with redistribution layers, called wafer level CSP (WLCSP). This is a packaged component base structure. Many industry leaders are developing stacked WLCSP just like 3D-package structures to offer inexpensive alternatives to 3D packages.
These two packages are often categorized together now. Because of their similar package structures, the challenges are also similar. They need underfill to fill the gaps between stacked dies or molded components. The micro-bumps are too small for mold compounds to fill the gaps, so capillary underfill is the most popular way. For productivity, chip-on-wafer process is desired: chip-stacking is done multiple times on a wafer, which includes another function as a bottom die. Then these stacked dies are filled with underfill. Tens to hundreds of dies are allocated on the wafer: very tight allocation with hundreds of micron distance to next stacked dies. Dispensing underfill between the stacked dies is thus one of the key challenges because of the narrow distance: small dot size, dispensing position accuracy, and productivity. The productivity means not only faster dispensing but also narrower distance is better for more dies on a wafer.
Key dispensing applications to serve the 3D packaging and WLP industries are:
- Capillary underfill dispensing for stacked dies and molded components
- Flux dispensing for die stacking